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november 2010 doc id 17156 rev 3 1/16 16 std11nm50n STF11NM50N, stp11nm50n n-channel 500 v, 0.4 , 8.5 a mdmesh? ii power mosfet in dpak, to-220fp and to-220 features 100% avalanche tested low input capacitance and gate charge low gate input resistance application switching applications description these devices are made using the second generation of mdmesh? technology. this revolutionary power mosfet associates a new vertical structure to the company?s strip layout to yield one of the world?s lowest on-resistance and gate charge. it is therefore suitable for the most demanding high efficiency converters. figure 1. internal schematic diagram order codes v dss @t jmax r ds(on) max i d std11nm50n STF11NM50N stp11nm50n 550 v < 0.47 8.5 a dpak 1 3 1 2 3 to-220 1 2 3 to-220fp ! - v $ ' 3 table 1. device summary order codes marking package packaging std11nm50n 11nm50n dpak tape and reel STF11NM50N 11nm50n to-220fp tube stp11nm50n 11nm50n to-220 tube www.st.com
contents std11nm50n, STF11NM50N, stp11nm50n 2/16 doc id 17156 rev 3 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 std11nm50n, STF11NM50N, stp11nm50n electrical ratings doc id 17156 rev 3 3/16 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit to-220 dpak to-220fp v ds drain-source voltage (v gs = 0) 500 v v gs gate-source voltage 25 v i d drain current (continuous) at t c = 25 c 8.5 8.5 (1) 1. limited only by maximu m temperature allowed a i d drain current (continuous) at t c = 100 c 6 6 (1) a i dm (2) 2. pulse width limited by safe operating area drain current (pulsed) 34 34 (1) a p tot total dissipation at t c = 25 c 70 70 25 w dv/dt (3) 3. i sd 8.5 a, di/dt 400 a/s, v peak < v (br)dss ,v dd = 80% v (br)dss peak diode recovery voltage slope 15 v/ns v iso insulation withstand voltage (rms) from all three leads to external heat sink (t = 1 s; t c = 25 c) 2500 v t stg storage temperature - 55 to 150 c t j max. operating junc tion temperature 150 c table 3. thermal data symbol parameter value unit to-220 dpak to-220fp r thj-case thermal resistance junction-case max 1.79 5 c/w r thj-amb thermal resistance junction-ambient max 62.5 62.5 c/w r thj-pcb thermal resistance junction-pcb max (1) 1. when mounted on 1inch2 fr-4 board, 2 oz cu 50 c/w t l maximum lead temperature for soldering purpose 300 300 c table 4. thermal data symbol parameter value unit i ar avalanche current, repetetive or not repetetive (1) 1. pulse width limited by t jmax. 3a e as single pulse avalanche energy (2) 2. starting t j = 25 c, i d = i ar , v dd = 50 v. 150 mj electrical characteristics std11nm50n, STF11NM50N, stp11nm50n 4/16 doc id 17156 rev 3 2 electrical characteristics (t c = 25 c unless otherwise specified) table 5. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 500 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c =125 c 1 100 a a i gss gate-body leakage current (v ds = 0) v gs = 25 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 4.5 a 0.4 0.47 table 6. dynamic symbol parameter test conditions min. typ. max. unit c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 50 v, f = 1 mhz, v gs = 0 - 547 42 2 - pf pf pf c oss eq. (1) 1. c oss eq. is defined as a constant equi valent capacitance giving t he same charging time as c oss when v ds increases from 0 to 80% v ds . output equivalent capacitance v ds = 0 to 400 v, v gs = 0 - 210 - pf r g intrinsic gate resistance f = 1 mhz open drain - 5.8 - q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 400 v, i d = 8.5 a, v gs = 10 v (see figure 18 ) - 19 3.7 10 - nc nc nc std11nm50n, STF11NM50N, stp11nm50n electrical characteristics doc id 17156 rev 3 5/16 table 7. switching times symbol parameter test conditions min. typ. max unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 250 v, i d = 4.25 a, r g = 4.7 , v gs = 10 v (see figure 19 ) - 8 10 33 10 - ns ns ns ns table 8. source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm (1) 1. pulse width limited by safe operating area source-drain current source-drain current (pulsed) - 8.5 34 a a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 8.5 a, v gs = 0 - 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 8.5 a, di/dt = 100 a/s v dd = 60 v (see figure 22 ) - 230 2.1 18 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 8.5 a, di/dt = 100 a/s v dd = 60 v, t j = 150 c (see figure 22 ) - 275 2.5 18 ns c a electrical characteristics std11nm50n, STF11NM50N, stp11nm50n 6/16 doc id 17156 rev 3 2.1 electrical characteristics (curves) figure 2. safe operating area for to-220 figure 3. thermal impedance for to-220 figure 4. safe operating area for to-220fp figure 5. thermal impedance for to-220fp figure 6. safe operating area for dpak figure 7. thermal impedance for dpak ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n g l e p u l s e ! - v ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n g l e p u l s e ! - v ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n g l e p u l s e ! - v std11nm50n, STF11NM50N, stp11nm50n electrical characteristics doc id 17156 rev 3 7/16 figure 8. output characteristics figure 9. transfer characteristics figure 10. gate charge vs gate-source voltage figure 11. static drain-source on resistance figure 12. capacitance variations figure 13. output capacitance stored energy ) $ 6 $ 3 6 ! 6 6 6 ' 3 6 ! - v ) $ 6 ' 3 6 ! 6 $ 3 6 ! - v 6 ' 3 1 g n # 6 6 $ $ 6 ) $ ! 6 $ 3 6 ' 3 ! - v 2 $ 3 o n ) $ ! / h m 6 ' 3 6 ! - v # 6 $ 3 6 p & |